Readings Newsletter
Become a Readings Member to make your shopping experience even easier.
Sign in or sign up for free!
You’re not far away from qualifying for FREE standard shipping within Australia
You’ve qualified for FREE standard shipping within Australia
The cart is loading…
This title is printed to order. This book may have been self-published. If so, we cannot guarantee the quality of the content. In the main most books will have gone through the editing process however some may not. We therefore suggest that you be aware of this before ordering this book. If in doubt check either the author or publisher’s details as we are unable to accept any returns unless they are faulty. Please contact us if you have any questions.
This title carefully details design tools and techniques for high-performance ASIC design. Using these techniques, the performance of ASIC designs can be improved by two to three times. Important topics include: improving performance through microarchitecture; timing-driven floorplanning; controlling and exploiting clock skew; high performance latch-based design in an ASIC methodology; automatically identifying and synthesizing complex logic gates; automated cell sizing to increase performance and reduce power; and controlling process variation. These techniques are illustrated by designs running two to three times the speed of typical ASICs in the same process generation.
$9.00 standard shipping within Australia
FREE standard shipping within Australia for orders over $100.00
Express & International shipping calculated at checkout
This title is printed to order. This book may have been self-published. If so, we cannot guarantee the quality of the content. In the main most books will have gone through the editing process however some may not. We therefore suggest that you be aware of this before ordering this book. If in doubt check either the author or publisher’s details as we are unable to accept any returns unless they are faulty. Please contact us if you have any questions.
This title carefully details design tools and techniques for high-performance ASIC design. Using these techniques, the performance of ASIC designs can be improved by two to three times. Important topics include: improving performance through microarchitecture; timing-driven floorplanning; controlling and exploiting clock skew; high performance latch-based design in an ASIC methodology; automatically identifying and synthesizing complex logic gates; automated cell sizing to increase performance and reduce power; and controlling process variation. These techniques are illustrated by designs running two to three times the speed of typical ASICs in the same process generation.