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This volume is a follow up to the author’s books, VHDL Answers to Frequently Asked Questions (ISBN 0-7923-9791-6) and VHDL Coding Styles and Methodologies (ISBN 0-7923-9598-0). It addresses: misinterpretations in the use of the language; methods for writing error-free, and simulation-efficient, code for testbench designs and for synthesis; and general principles and guidelines for design verification. This second edition includes the following additions: a new chapter on design for reuse that defines coding and design techniques that are impermeable to new technologies and are malleable to new requirements; more questions and answers including discussions on applications of guarded signals and shared variables; and more models including the design of a reusable priority encoder, and a switch; more packages including an enhancement of image package to convert values to text strings in binary, hexadecimal, and decimal formats, and the complex package that defines complex numbers and overloaded operators. The text emphasizes real VHDL, rather than philosophical or introductory types of information; emphasizes application of VHDL for synthesis; uses complete examples to demonstrate problems and solutions; provides a disk that includes all the book examples and other useful VHDL reference material; uses easy to remember symbology notation to emphasize language rules, good and poor methodology and coding styles; identifies obsolete VHDL constructs that must be avoided; identifies synthesizable/non-synthesizable structures; and uses a question and answer format to clarify and emphasize the concerns of VHDL users.
