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This title is printed to order. This book may have been self-published. If so, we cannot guarantee the quality of the content. In the main most books will have gone through the editing process however some may not. We therefore suggest that you be aware of this before ordering this book. If in doubt check either the author or publisher’s details as we are unable to accept any returns unless they are faulty. Please contact us if you have any questions.
This text presents a new method to generate high quality analogue signals with low hardware complexity. The theory of periodic S-encoded bitstreams is presented along with a set of empirical tables to help select the appropriate parameters of a bitstream. An optimization procedure is also outlined to help select a bit sequence with the desired attributes. A large variety of signals can be generated using this approach. Silicon implementation issues are discussed with a specific emphasis on area overhead and ease of design. One FPGA circuit and three different silicon implementations are presented along with experimental results. It is shown that simple designs are capable of generating very high precision signals-on-chip. The technique is further extended to multi-bit signal generation where it is shown how to increase the performance of arbitrary waveform, generators commonly found in past and present-day mixed-signal testers. No hardware modifications are required, only the numbers in memory are changed. Three different calibration techniques to reduce the effects of the AWG’s non-linearities are also introduced, together with supporting experimental evidence. The main focus of this text is to describe an area-efficient technique for analogue signal generation using S-encoded data stream. The main characteristics of the technique are: high quality signals (SFDR of 110 dB observed); a large variety of signals generated; bitstreams easily obtained with a fast optimization program; good frequency resolution, compatible with coherent sampling; simple and fast hardware implementation; mostly digital, except an easily testable 1-bit DAC and possibly a reconstruction filter; memory already available on-chip can be reused, reducing area overhead; designs can be incorporated into existing CAD tools; and high frequency generation.
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This title is printed to order. This book may have been self-published. If so, we cannot guarantee the quality of the content. In the main most books will have gone through the editing process however some may not. We therefore suggest that you be aware of this before ordering this book. If in doubt check either the author or publisher’s details as we are unable to accept any returns unless they are faulty. Please contact us if you have any questions.
This text presents a new method to generate high quality analogue signals with low hardware complexity. The theory of periodic S-encoded bitstreams is presented along with a set of empirical tables to help select the appropriate parameters of a bitstream. An optimization procedure is also outlined to help select a bit sequence with the desired attributes. A large variety of signals can be generated using this approach. Silicon implementation issues are discussed with a specific emphasis on area overhead and ease of design. One FPGA circuit and three different silicon implementations are presented along with experimental results. It is shown that simple designs are capable of generating very high precision signals-on-chip. The technique is further extended to multi-bit signal generation where it is shown how to increase the performance of arbitrary waveform, generators commonly found in past and present-day mixed-signal testers. No hardware modifications are required, only the numbers in memory are changed. Three different calibration techniques to reduce the effects of the AWG’s non-linearities are also introduced, together with supporting experimental evidence. The main focus of this text is to describe an area-efficient technique for analogue signal generation using S-encoded data stream. The main characteristics of the technique are: high quality signals (SFDR of 110 dB observed); a large variety of signals generated; bitstreams easily obtained with a fast optimization program; good frequency resolution, compatible with coherent sampling; simple and fast hardware implementation; mostly digital, except an easily testable 1-bit DAC and possibly a reconstruction filter; memory already available on-chip can be reused, reducing area overhead; designs can be incorporated into existing CAD tools; and high frequency generation.